This description relates to managing memory access requests with prefetch for streams.
Modern processors support ‘prefetch’ for certain memory requests, including ‘streams’. A stream (also called a ‘strided stream’) occurs when there is a sequence of multiple requests for values, where the address offset between adjacent values in the stream (called the ‘stride’) is fixed (e.g., measured in cache lines (or ‘cache blocks’). Alternatively, ‘correlated prefetching’ can be performed, where the address offset between a previous value and a next value that is assumed to be correlated to a previous value is equal to a single cache line by default. A stream can be increasing, or decreasing, in the addresses of adjacent values. Generally, a prefetch request is a type of memory request that attempts to predict a future memory request based on a predicted access pattern. The prefetch request is used to preload a cache level (e.g., of a data cache) so that the future memory request will hit in that cache level instead of having to access a higher cache level or a main memory. A stream may be detected (or ‘learned’) after its stride is determined and one or more prefetched values have been successfully predicted. Some processors may be configured to perform prefetching for multiple separate, independent streams. For each stream, a training mechanism may be performed separately for each independent stream to detect its stride value, without taking into account the type of any previous prefetching.